Job VC

Confluence Embedded FPGA Git Jira +8

Embedded FPGA Perl Python VHDL +1

Embedded FPGA Git Linux MATLAB +6

Embedded FPGA Git I2C Rust +2

AI Agile Embedded FPGA PCB +1

AI Agile Embedded FPGA PCB +1

Altium C++ CAD Embedded FPGA +8

C++ Embedded FPGA Linux Python +1

Android C++ Embedded FPGA Java +4

AI Agile Embedded FPGA PCB +1

FPGA MATLAB Python Simulink VHDL +1

Altium C++ Embedded FPGA KiCad +1

Altium FPGA PCB

Altium FPGA PCB

Altium C++ Embedded FPGA KiCad +2

Embedded FPGA PCB

FPGA Git I2C SPI UART +2

Altium FPGA Git GitLab

FPGA OSINT VHDL Verilog

Altium FPGA Git GitLab PCB

Altium FPGA Git GitLab

FPGA Git GitLab Jenkins Jira +5

AI C++ Claude Cursor Embedded +8

C++ Embedded FPGA I2C Linux +6

Altium Embedded FPGA KiCad SolidWorks

C++ ETL Embedded FPGA PCB

Confluence Embedded FPGA Git Jira +8

C CI/CD Embedded FPGA I2C +6

C# C++ Embedded FPGA Git +9

C# C++ Embedded FPGA Git +9

CI/CD Docker Embedded FPGA Git +9

FPGA VHDL Verilog

Embedded FPGA PCB

FPGA

Altium C++ FPGA Git Python

Altium Embedded FPGA KiCad MATLAB +4

Altium FPGA PCB

Altium C++ Embedded FPGA KiCad +2

Altium C++ CAD Embedded FPGA +3

FPGA PCB SPI UART

Altium FPGA KiCad PCB RF +1

Embedded FPGA Git Linux MATLAB +6

C++ FPGA VHDL Verilog

FPGA OSINT VHDL Verilog

C++ CI/CD FPGA Git MATLAB +2

FPGA VHDL Verilog

C++ CI/CD FPGA Git Python +2

Embedded FPGA Perl Python VHDL +1

Altium CAD Embedded FPGA KiCad +2

Embedded FPGA VHDL Verilog